Microwave Power Amplifiers

High Emciency Microwave Power Amplifier (HEMPA)

Since the Space Age began, various microwave power amplifier designs that used Class-A, -B, and -C bias arrangements have been employed. However, a common limitation of these amplifiers is the high input power required to generate the RFImicrowave power. In fact, the microwave amplifier has typically been the largest drain for the limited power available on the spacecraft because its conversion efficiency is only 10- to 20-percent. In contrast, state of the art (SOA) Low-Frequency (LF) to High Frequency amplifiers commonly attain a conversion efficiency of 80-95-percent. To achieve high efficiency in that region of the RF spectrum. a Class-D bias configuration must be used. Themfa, it seemed reasonable that a Class-D bias configuration might also produce high efficiencies in the microwave frequency band.

Baxandall (Raab, 1982) first designated the Class-D terminology in the early 1960s while working with transistor sine wave gemtors from switching mode oscillators. The Class-D amplifier has several distinguishing characteristics:

-It has both high voltage across the device and large current through the device,

-though not simultaneously;

-It is composed of one or more transistors operating as single-pole switches; and

-The frequency of the output signal is the fundamental switching frequency.

Little research has addressed Class-D microwave amplifiers - called High-Efficiency Microwave Power Amplifiers (HEMPA). Therefore, a 2250-MHz HEMF'A was designed and tested to determine whether the power conversion efficiency of SOA microwave amplifiers could be significantly raised. This case study involved parameter extraction and modeling of microwave power GaAs FET devices and then with assessing the appropriate power divider topology. Finally, a single-stage power amplifier was built and tested to determine its conversión efficiency and gain.

ANALYTICAL MODELING

In the past, many hours were spent in the "what-if' method of designing a new microwave power amplifier. Today, the use of high-speed computers condenses this "what-if' method so that multiple amplifier configurations can be accurately simulated in far less time than a single configuration took previously. The simulation of a HEMPA was implemented by taking three distinct steps. First, the transistors were modeled using the HP EEFet3 (HewlettlPackard. 1981-2000) model incorporated in IC-CAP (Hewlettmackard, 1981-2000) to extract particular transistor parameters. That information, in turn, was used in a jOmega (Hewlettmackard, 1981-2000) simulation, which is a general-purpose RF/microwave circuit simulation program developed by HP/EE&f for nonlinear DC, nonlinear transient and linear AC analyses. The HP EEFet3 model is described in detail below.

Microwave Transistor Models

The HP met3 model is an empirical model developed for fitting measured electrical behavior of GaAs FETs. The model includes the following features: An accurate isothermal drain-source current model that fits virtually all p-;

-          A self-heating correction for the drain-source current;

-          A charge model that accurately emulates measured capacitance values;

-          A dispersion model that permits simultaneous fitting of high-frequency conductances and DC characteristics;

-          A breakdown model that describes gatedrain current as a function of both gateto-source and drain-to-source voltage, V, and V, respectively;

-          The capability to extrapolate outside the measurement range used to extract the

model.

The high-frequency FET modeling software IC-CAP performs a series of DC- and S-Parameter

measurements, based on predefined measurement configurations and on variables defined during the procedures outlined below. The measured values are then used to extract individual device parameters through software conversion of the S-parameters to admittance or impedance parameters. The resulting model can then be used to simulate the performance of the actual device in a circuit. The procedures involved use a series of setpoints to measure current or voltage vs. bias under different bias conditions. Setpoints serve to decouple the model equations and to effectively isolate the individual FET parameters. The following ten procedures are used to isolate these

parameters:

-          Device preview - verifies proper device operation;

-          Measure drain current as a function of swept gate voltage;

-          Vary the drain current with respect to drain voltages, at several values of gate

-          voltage (Family of Curves);

-          Preview of source, drain and gate resistances using Yang-Long method;

-          Final Yang-Long measurement;

-          Extraction of intrinsic and extrinsic parasitics from S-parameter data;

-          Measure Ideality, I, of FET;

-           Measure the values of V, with V, at a constant value of vdpo;

-          Measure Ls vs. vds while varying V,; and

-          Measure swept S-parameters.

Once a complete set of data is collected for a particular device, the extraction proceeds by iteratively

determining the proper small-signal model parameter values. In the governing equations, the voltages are assumed intrinsic. The HP met3 model uses intrinsic voltages to predict device performance. However, since there is no known way to directly measure or to set the intrinsic voltages, they are calculated using the parasitic resistances and inductances and the known currents.

t

HEMPA Model

Most nonlinear circuit analysis programs that exist today were designed primarily for transient analysis. However, they are not often adequate when the designer needs to simulate GaAs FETs that are required to operate at high DC-to-RF conversion efficiencies -- a more sophisticated model is needed. One method that works well in this arena is called harmonic-balance, as described by Qdr6 et al. (1993).

The harmonic-balance method is iterative in nature and is based on the assumption that, for a given sinusoidal excitation, a steady state solution exists that can be approximated with a finite Fourier series. With the solution postulated in the form of a finite Fourier series, the circuit node voltages take on a set of amplitudes and phases for all frequency components. The currents flowing from nodes into linear elements, including all distributed elements, are calculated by a frequency domain linear analysis. Currents from nodes into nonlinear elements are calculated in the time domain. Generalized Fourier analysis is used to transform from the timedomain to the frequency-domain. The jOmega simulation is the implementation of a harmonic-balance analysis.

Power Divider for Harmonically Rich WaveformdSm

A major obstacle to overcome in the design and development of a HEMPA dealt with the accurate division of a single harmonically rich square wave signal into two equal-amplitude, opposite-phase signals. Current divider topologies - like the Wilkinson hybrid, the radial wave power hybrid (Swift, 1988) and the multiport power divider using circular-sector-shaped planar components (Abouzahra, 1988) -- are not well suited for this application due to bandwidth constraints.

Therefore, the development of a new topology was required to propagate square wave signals more efficiently. This new topology uses a push-pull configuration in the amplifier, which results in greater power generating capability. Furthermore, unique requirements for a HEMPA drove two significant features:

-          The fundamental frequency and all odd ordered harmonics must maintain their phase and amplitude relationship;

-          Each frequency component, normalized to the fundamental, must be phase coherent at the output.

All simulations to verify the above theory used transmission lines in the jOmega model. The simulation used two transmission lines: one that was A12 in total length and the other being I in total length, where the frequency of interest was 2 GHz. Initially, ideal transmission lines were assumed, but verification of theory was also carried out using a non-ideal microstrip, since the ideal does not exist in practice. The microstripline measurements generated in the simulation were used in the layout portion of jOmega, and the final board geometry.

2250-MHZ HEMPA DESIGN AND TEST

Following the simulations to validate the theory of a Class-D microwave amplifier, a single stage, 2.25-GHz amplifier was built and tested, and is shown in Figure 4. There were multiple objectives of these tests.

-          Validate IC-Cap Models;

-          Validate power dividedcombiner;

-          Validate jOmega RF models;

-          Efficiency of conversion of sine-wave to square-wave;

Similar to the power divider sub-circuit, the first topology simulated used ideal models- the only exception being the transistor models. As the analysis continued, the ideal components, including resistors, inductors and capacitors, were replaced with practical models. Again, the reason for this multi-step approach was to verify several essential issues specific to a HEMPA. The first issues deals with an efficient method of converting the sine wave receiver/exciter (RE) signal to a square-wave. Once the waveform is converted, accurate amplification of the signal can proceed. The second issue deals with the improvement of the input VSWR. Because the amplifier is in either cut-off or saturation, the input impedance varies dramatically between these two extremes.

experiment was to vary the drain and gate, V, and V, respectively, voltages to find the biasing arrangement that resulted in maximum efficiency with maximum gain. V, was varied from -2.5 to -1.0 VDC in 0.1-VDC increments and V, was varied from 2.5 to 4.5 VDC in 0.25-VDC increments. The amplifier gain relative to the fundamental frequency (2250 MHz) with input power of +10-dBm was also measured. Additionally the drain current, L in milliamps, was measured to determine the input DC current. Using equations (1) and (2). along with the reflected power in milliwatts was determined.

Using standard lab test equipment, performance measurements were taken. The objective of the first Where Pi,is the incident power (in this case +10-dBm) and p is the reflection coefficient given by

P = (VSWR - 1)/ (VSWR + 1)

The result from this multiplication shows that for an approximate 10% decrease in the maximum efficiency (where V, = 2.5 VDC, and V, = -3.0 VDC) an increase of 3-dB in gain (where V, = 3.75 VDC, and V, = -2.0VDC) can be achieved. The final amplifier exhibits 9.11- of gain with an efficiency of 40.2-percent - which is quadruple the efficiency of a typical S-band amplifier. If the efficiency is considered more important than the gain then máximum efficiency of the stage could be biased for 49.5-percent efficiency, but with a gain of only 6.72-dB.

Pablo Jose Mago V.

C.I. 18146112

EES